This normie is seeing some 2025 RISC-V hype. I don't know how instruction sets work or what support entails. RISC-V = Roc Is Soon Compatible -with- Very funky hardware?
Should be just a config in llvm for the most part. So not hard to add. I hacked a random arm chip into roc before. Would be the same work.
I guess one of the problems is that often times arm and riscv have like infinite different configs.
Ah, so like our releases would add riscv-foo.tar, riscv-bar.tar, riscv-baz.tar, ... etc?
I'm glad it doesn't seem hard to you! I don't foresee any personal need for it, just curious.
Oh, I was more thinking of cross compiling. But we could have native toolchains as well.
Also, you can always compile for a minimal subset if you aren't worried about max perf, but a lot of embedded arm and riscv stuff likes to compile for the exact chip
for releasing the compiler on riscv or various forms of arm, we almost certainly would just do the minimal subset.
Gotttcha, that makes sense. Yeah my context for asking is that Framework Laptops just released a RISC-V mainboard option, and I wondered how much daily driving it would make my Roc dev life harder.
Just search CpuModel on this page: https://ziglang.org/documentation/master/std/#src/std/Target/arm.zig
All with their own combination of config settings
Not sure how/if roc would want to expose something like that.
I imagine Roc itself wouldn't be a major contributor to cutting-edge daily-driver woes, whether on RISC-V or like a Raspberry Pi.
a major contributor to cutting-edge daily-driver woes
what do you mean by this?
Like if my primary dev machine were a laptop powered by a RISC-V mainboard (or a Raspberry Pi chip or something else funky), I'd bump into plenty of hardware support issues but Roc wouldn't be the source of >5% of them.
I expect most of my issues would be either unrelated developer tools or things upstream/downstream of Roc (like Zig & platforms, respectively)
Last updated: Jun 16 2026 at 16:19 UTC